The present application relates to a printed circuit board assembly which is available for hardware such as a portable phone, and a method of manufacturing the same.
Accompanying with enhancing functionality of the hardware such as the portable phone and downsizing it, multiple layers for circuit wiring have been advanced in any printed circuit boards that are available for the hardware. Such the multiple layers for circuit wiring in the printed circuit boards have enabled a degree of freedom in the circuit wiring to be increased, thereby allowing a high density of wired wires to be implemented. Multi-layered printed circuit board has been made in general by using build-up technology or the like such that insulation layers and wiring layers have been alternately formed on a core printed circuit board.
Alternatively, Japanese Patent Application Publication No. H11-168279 has disclosed that a multi-layered printed circuit board assembly and a method of manufacturing the same in which an air layer stays between the stacked plastic sheets. The multi-layered printed circuit board disclosed in Japanese Patent Application Publication No. H11-168279 is manufactured so that plastic sheets each having circuit patterns and electrode terminals are stacked and connected to each other electrically via a solvent-soluble filler layer having a predetermined thickness and then, the solvent-soluble filler layer can be dissolved to provide the air layer between the stacked plastic sheets.
Further, Japanese Patent Application Publication No. H08-8539 has disclosed that a multi-layered printed circuit board assembly and a method of manufacturing the same in which metal layers of the printed circuit boards are plated and connected to each other. The multi-layered printed circuit board assembly disclosed in Japanese Patent Application Publication No. H08-8539 is manufactured so that printed circuit boards each in which a circuit pattern of metal layer is formed are faced to each other and held at a predetermined position and the metal layers in the circuit patterns that are faced to each other are connected to each other using electrolytic plating by energizing the metal layers.
However, in the above-mentioned method of manufacturing the multi-layered printed circuit board assembly using the build-up technology, as the numbers of layers of the printed circuit boards to be manufactured are increased, proportion defective may be accumulated in the layers, so that a yield rate for a final complete printed circuit board assembly is decreased, thereby causing manufacture costs for the multi-layered printed circuit board assembly to increase.
According to the multi-layered printed circuit board assembly and the method of manufacturing the same, which have been disclosed in Japanese Patent Application Publication No. H11-168279, it is necessary to dissolve the solvent-soluble filler layer between the plastic sheets after the plastic sheets have been connected to each other via the solvent-soluble filler layer. This causes the manufacture steps to be complicated, thereby increasing its manufacture costs.
Further, according to the multi-layered printed circuit board assembly and the method of manufacturing the same, which have been disclosed in Japanese Patent Application Publication No. H08-8539, it is necessary to connect the printed circuit boards to each other using electrolytic plating by energizing the metal layers with the metal layers being face to each other in the printed circuit board assembly when connecting the printed circuit boards. This also causes the manufacture steps to be complicated, thereby increasing its manufacture costs.